october 2013 ?2011 fairchild semiconductor corporation FDMC8015L rev.c1 www.fairchildsemi.com 1 FDMC8015L n-channel powertrench ? mosfet tm FDMC8015L n-channel power trench ? mosfet 40 v, 18 a, 26 m features ? max r ds(on) = 26 m at v gs = 10 v, i d = 7 a ? max r ds(on) = 36 m at v gs = 4.5 v, i d = 6 a ? low profile - 1 mm max in power 33 ? 100% uil tested ? rohs compliant general description this n-channel mosfet is produced using fairchild semiconductor?s advanced power trench ? process that has been especially tailored to minimi ze the on-state resistance and yet maintain superior switching performance. applications ? load switch ? motor bridge switch mosfet maximum ratings t a = 25 c unless otherwise noted thermal characteristics package marking and ordering information symbol parameter ratings units v ds drain to source voltage 40 v v gs gate to source voltage 20 v i d drain current -continuous (package limited) t c = 25c 18 a -continuous (silicon limited) t c = 25c 22 -continuous t a = 25c (note 1a) 7 -pulsed 30 e as single pulse avalanche energy (note 3) 32 mj p d power dissipation t c = 25c 24 w power dissipation t a = 25c (note 1a) 2.3 t j , t stg operating and storage junction temperature range -55 to + 150 c r jc thermal resistance, junction to case 5.1 c/w r ja thermal resistance, junction to ambient (note 1a) 53 device marking device package reel size tape width quantity FDMC8015L FDMC8015L power 33 13?? 12 mm 3000 units g s s s d d d d 5 6 7 8 3 2 1 4 1 2 3 4 5 d d d d g s s s bottom top mlp 3.3x3.3 6 7 8
www.fairchildsemi.com 2 ?2011 fairchild semiconductor corporation FDMC8015L rev. c1 FDMC8015L n-channel powertrench ? mosfet tm electrical characteristics t j = 25 c unless otherwise noted off characteristics on characteristics dynamic characteristics switching characteristics drain-source diode characteristics symbol parameter test conditions min typ max units bv dss drain to source breakdown voltage i d = 250 a, v gs = 0 v 40 v bv dss t j breakdown voltage temperature coefficient i d = 250 a, referenced to 25 c 36 mv/c i dss zero gate voltage drain current v ds = 32 v, v gs = 0 v 1 a i gss gate to source leakage current v gs = 20 v, v ds = 0 v 100 na v gs(th) gate to source threshold voltage v gs = v ds , i d = 250 a11.83v v gs(th) t j gate to source threshold voltage temperature coefficient i d = 250 a, referenced to 25 c -6 mv/c r ds(on) static drain to source on resistance v gs = 10 v, i d = 7 a 19.7 26 m v gs = 4.5 v, i d = 6 a 24 36 v gs = 10 v, i d = 7 a, t j = 125 c 29 39 g fs forward transconductance v dd = 5 v, i d = 7 a 30 s c iss input capacitance v ds = 20 v, v gs = 0 v, f = 1 mhz 710 945 pf c oss output capacitance 94 125 pf c rss reverse transfer capacitance 58 90 pf r g gate resistance 1.2 t d(on) turn-on delay time v dd = 20 v, i d = 7 a, v gs = 10 v, r gen = 6 6.3 13 ns t r rise time 1.9 10 ns t d(off) turn-off delay time 18 33 ns t f fall time 1.7 10 ns q g(tot) total gate charge v gs = 0 v to 10 v v dd = 20 v, i d = 7 a 13.6 19 nc q g(tot) total gate charge v gs = 0 v to 4.5 v 6.6 10 nc q gs total gate charge 1.9 nc q gd gate to drain ?miller? charge 2.5 nc v sd source to drain diode forward voltage v gs = 0 v, i s = 7 a (note 2) 0.84 1.2 v v gs = 0 v, i s = 2 a (note 2) 0.76 1.1 t rr reverse recovery time i f = 7 a, di/dt = 100 a/ s 18 33 ns q rr reverse recovery charge 8.6 18 nc notes: 1. r ja is determined with the device mounted on a 1 in 2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of fr-4 material. r jc is guaranteed by design while r ca is determined by the user's board design. 2. pulse test: pulse width < 300 s, duty cycle < 2.0%. 3. starting t j = 25 c; n-ch: l = 1 mh, i as = 8 a, v dd = 36 v, v gs = 10 v. 53 c/w when mounted on a 1 in 2 pad of 2 oz copper 125 c/w when mounted on a minimum pad of 2 oz copper a. b.
www.fairchildsemi.com 3 ?2011 fairchild semiconductor corporation FDMC8015L rev. c1 FDMC8015L n-channel powertrench ? mosfet tm typical characteristics t j = 25 c unless otherwise noted figure 1. 0 0.5 1.0 1.5 2.0 2.5 0 5 10 15 20 25 30 v gs = 4.5 v v gs = 4 v v gs = 3.5 v pulse duration = 80 p s duty cycle = 0.5% max v gs = 3 v v gs = 10 v i d , drain current (a) v ds , drain to source voltage (v) on region characteristics figure 2. 0 5 10 15 20 25 30 0.5 1.0 1.5 2.0 2.5 3.0 v gs = 4 v v gs = 3.5 v pulse duration = 80 p s duty cycle = 0.5% max normalized drain to source on-resistance i d , drain current (a) v gs = 4.5 v v gs = 3 v v gs = 10 v n o r m a l i z e d o n - r e s i s t a n c e vs drain current and gate voltage f i g u r e 3 . n o r m a l i z e d o n r e s i s t a n c e -75 -50 -25 0 25 50 75 100 125 150 0.6 0.8 1.0 1.2 1.4 1.6 1.8 i d = 7 a v gs = 10 v normalized drain to source on-resistance t j , junction temperature ( o c ) vs junction temperature figure 4. 24681 0 0 20 40 60 80 t j = 125 o c i d = 7 a t j = 25 o c v gs , gate to source voltage (v) r ds(on) , drain to source on-resistance ( m : ) pulse duration = 80 p s duty cycle = 0.5% max o n - r e s i s t a n c e v s g a t e t o source voltage figure 5. transfer characteristics 1 1.5 2.0 2.5 3.0 3.5 4.0 0 5 10 15 20 25 30 t j = 150 o c v ds = 5 v pulse duration = 80 p s duty cycle = 0.5% max t j = -55 o c t j = 25 o c i d , drain current (a) v gs , gate to source voltage (v) figure 6. 0 0.2 0.4 0.6 0.8 1.0 1.2 0.001 0.01 0.1 1 10 100 t j = -55 o c t j = 25 o c t j = 150 o c v gs = 0 v i s , reverse drain current (a) v sd , body diode forward voltage (v) s o u r c e t o d r a i n d i o d e forward voltage vs source current
www.fairchildsemi.com 4 ?2011 fairchild semiconductor corporation FDMC8015L rev. c1 FDMC8015L n-channel powertrench ? mosfet tm figure 7. 0 2 4 6 8 10 12 14 0 2 4 6 8 10 i d = 7 a v dd = 25 v v dd = 15 v v gs , gate to source voltage (v) q g , gate charge (nc) v dd = 20 v gate charge characteristics figure 8. 0.1 1 10 40 10 100 1000 2000 f = 1 mhz v gs = 0 v capacitance (pf) v ds , drain to source voltage (v) c rss c oss c iss c a p a c i t a n c e v s d r a i n to source voltage figure 9. 0.01 0.1 1 10 20 1 10 20 t j = 100 o c t j = 25 o c t j = 125 o c t av , time in avalanche (ms) i as , avalanche current (a) u n c l a m p e d i n d u c t i v e switching capability figure 10. 25 50 75 100 125 150 0 5 10 15 20 25 limited by package v gs = 4.5 v r t jc = 5.1 o c/w v gs = 10 v i d , drain current (a) t c , case temperature ( o c ) m a x i m u m c o n t i n u o u s d r a i n current vs case temperature f i g u r e 1 1 . f o r w a r d b i a s s a f e op erating area 0.1 1 10 100 0.01 0.1 1 10 50 100 us 1 ms 1 s 10 ms dc 10 s 100 ms i d , drain current (a) v ds , drain to source voltage (v) this area is limited by r ds(on) single pulse t j = max rated r t ja = 125 o c/w t a = 25 o c figure 12. 10 -4 10 -3 10 -2 10 -1 110 100 1000 0.5 1 10 100 500 single pulse r t ja = 125 o c/w t a = 25 o c p ( pk ) , peak transient power (w) t, pulse width (sec) s i n g l e p u l s e m a x i m u m power dissipation typical characteristics t j = 25 c unless otherwise noted
www.fairchildsemi.com 5 ?2011 fairchild semiconductor corporation FDMC8015L rev. c1 FDMC8015L n-channel powertrench ? mosfet tm figure 13. 10 -4 10 -3 10 -2 10 -1 11 0 100 1000 0.001 0.01 0.1 1 single pulse r t ja = 125 o c/w duty cycle-descending order normalized thermal impedance, z t ja t, rectangular pulse duration (sec) d = 0.5 0.2 0.1 0.05 0.02 0.01 2 p dm t 1 t 2 notes: duty factor: d = t 1 /t 2 peak t j = p dm x z t ja x r t ja + t a junction-to-ambient transient thermal response curve typical characteristics t j = 25 c unless otherwise noted
www.fairchildsemi.com 6 ?2011 fairchild semiconductor corporation FDMC8015L rev. c1 FDMC8015L n-channel powertrench ? mosfet tm dimensional outlin e and pad layout b top view 0.10 c 0.10 c 2x 2x pin1 ident a ? ? keep out area (3.40) 2.37 0.45(4x) (1.70) 2.15 (0.65) 0.42(8x) 0.70(4x) 0.65 1.95 (0.40) 4 1 8 5 notes: a.except as noted, package conforms to jedec registration mo-240 variation ba.. b.dimensions are in millimeters. c.dimensions and tolerances per asme y14.5m,1994. d.seating plane is defined by terminal tips only e.body dimensions do not include mold flash protrusions nor gateburrs. f.flange dimensions include interterminal flash or protrusion. interterminal flash or protrusion shall not exceed 0.25mm per side. g.it is recommended to have no traces or via within the keep out area. h.drawing filename: mkt-mlp08trev3. i.general radii for all corners shall be 0.20mm max. j.fairchild semiconductor. 0.10 c a b 0.05 c bottom view 0.08 c 0.05 0.00 side view seating plane 0.10 c (0.20) 8 5 1.95 0.65 0.32 + 0.05 4 1 (8x) 2.27 + 0.05 0.45 + 0.05 (4x) (1.20) 0.45 + 0.05 (3x) 2.05 + 0.05 (0.40) ? 0 $ ; c 0.8max recommended land pattern a a
FDMC8015Ln-channel powertrench ? mosfet tm ?2011 fairchild semiconductor corporation 7 www.fairchildsemi.com FDMC8015L rev.c1 trademarks the following includes registered and unregistered trademarks and service marks, owned by fairchild semiconductor and/or its gl obal subsidiaries, and is not intended to be an exhaustive list of all such trademarks. *trademarks of system general corporation, used under license by fairchild semiconductor. disclaimer fairchild semiconductor reserves the right to make changes wi thout further notice to any products herein to improve reliability, function, or design. fairchild does not assume an y liability arising out of the application or use of any product or circuit described herein; neither does it convey an y license under its patent rights, nor the rights of others. these specifications do not expand the term s of fairchild?s worldwide terms and conditions, specifically the warranty therein, which covers these products. life support policy fairchild?s products are not authorized for use as critical components in life support de vices or systems without the express written approval of fai rchild semiconductor corporation. as used here in: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms accupower? ax-cap ? * bitsic? build it now? coreplus? corepower? crossvolt ? ctl? current transfer logic? deuxpeed ? dual cool? ecospark ? efficentmax? esbc? fairchild ? fairchild semiconductor ? fact quiet series? fact ? fast ? fastvcore? fetbench? fps? f-pfs? frfet ? global power resource sm greenbridge? green fps? green fps? e-series? g max ? gto? intellimax? isoplanar? marking small speakers sound louder and better? megabuck? microcoupler? microfet? micropak? micropak2? millerdrive? motionmax? mwsaver ? optohit? optologic ? optoplanar ? powertrench ? powerxs? programmable active droop? qfet ? qs? quiet series? rapidconfigure? saving our world, 1mw/w/kw at a time? signalwise? smartmax? smart start? solutions for your success? spm ? stealth? superfet ? supersot?-3 supersot?-6 supersot?-8 supremos ? syncfet? sync-lock? ?* tinyboost ? tinybuck ? tinycalc? tinylogic ? tinyopto? tinypower? tinypwm? tinywire? transic? trifault detect? truecurrent ? * serdes? uhc ? ultra frfet? unifet? vcx? visualmax? voltageplus? xs? ? ? datasheet identification product status definition advance information formative / in design datasheet contains the design specifications for product development. specifications may change in any manner without notice. preliminary first production datasheet contains preliminary data; supplementary data will be published at a later date. fairchild semiconductor reserves the right to make changes at any time without notice to improve design. no identification needed full production datasheet contains final spec ifications. fairchild semiconductor reserves the right to make changes at any time without notice to improve the design. obsolete not in production datasheet contains specifications on a product that is discontinued by fairchild semiconductor. the datasheet is for reference information only. anti-counterfeiting policy fairchild semiconductor corporation?s anti-counterfeiting policy. fairchild?s anti-counterfeiting policy is also stated on our external website, www.fairchildsemi.com, under sales support . counterfeiting of semiconductor parts is a growing problem in the industry. all manufactures of semiconductor products are expe riencing counterfeiting of their parts. customers who inadvertently purchase counterfeit parts experie nce many problems such as loss of brand reputation, substa ndard performance, failed application, and increased cost of production and manufacturing del ays. fairchild is taking strong measures to protect ourselve s and our customers from the proliferation of counterfeit parts. fairchild strongly encourages customers to purchase fairchild parts either directly from fa irchild or from authorized fairchild distributors who are listed by country on our web page cited above. products customers buy either from fairchild directly or fr om authorized fairchild distributors are genuine parts, have full traceability, meet fairchild?s quality standards for handing and storage and provide access to fairchild?s full range of up-to-date technical and product information. fairchild and our authorized distributors will stand behind all warranties and wi ll appropriately address and warranty issues that may arise. fairchild will not provide any warranty coverage or other assistance for parts bought from unau thorized sources. fairchild is committed to combat this global problem and encourage our customers to do their part in stopping this practice by buying direct or from authorized distributors. rev. i66 tm ?
|
